INA228 Battery Current/Voltage Monitor¶

Overview¶

This circuit implements a battery monitoring system using the Texas Instruments INA228 current/voltage monitor IC. It measures battery voltage, and battery current through an external shunt in either battery lead, suitable for 48V battery systems with currents up to 500A (or any value, just need to keep shunt voltage <±163.84 mV)

System Architecture¶

Measurement Configuration¶

Battery Voltage Monitoring: Direct measurement of battery positive terminal via VBUS input
Current Measurement: Differential voltage measurement across an external shunt in either battery lead. The inputs sit near ground with a negative-lead shunt and at bus voltage with a positive-lead shunt
Communication: I2C interface at 7-bit address 0x40, on the shared 400 kHz sensor bus with the ADS1115 analog converter (0x48), the LSM6DSOX IMU (0x6A) and BMP388 (0x76); see Baro and Temp Sensor for the bus pull-up details
Supply Voltage: 3.3V logic supply

Connection Descriptions¶

Power and Signal Connections¶

Battery Interface¶

VBUS_INA228: Battery-positive sense wire, arriving on Cable 2 pin 11
Feeds INA228 pin 8 (VBUS) through R79 (100Ω) for voltage measurement
Low-pass filtered by R79 and C8 (1µF, 100V) at the pin

Current Shunt Interface¶

IN+_INA228: The shunt's + sense terminal (Cable 2 pin 9)
Connected through R73 (100Ω) to INA228 pin 10 (IN+)
IN-_INA228: The shunt's − sense terminal (Cable 2 pin 10)
Connected through R72 (100Ω) to INA228 pin 9 (IN-)

With the shunt in the negative lead both inputs sit near ground. With the shunt in the positive lead both sit at battery voltage.

INA228 IC (U20) Pin Configuration¶

Pin	Function	Connection
1	A1	System Ground (I2C address select)
2	A0	System Ground (I2C address = 0x40)
3	ALERT	ALERT! signal output: hardware overvoltage field cut, see below
4	SDA	I2C_SDA
5	SCL	I2C_SCL
6	VS	3.3V supply
7	GND	System Ground
8	VBUS	Battery positive measurement
9	IN-	Shunt negative terminal
10	IN+	Shunt positive terminal

Power Supply Decoupling¶

C8: 1µF, 100V - VBUS supply decoupling
Power supply decoupling for 3.3V rail (external to this circuit)

Battery Voltage Correction (Negative-Lead Shunt)¶

VBUS is measured against board ground, and board ground is the Regulator Ground Wire. With the shunt in the negative lead that wire lands on the shunt's load side, while the sense wire on Cable 2 pin 11 lands on the battery positive post. Charging current leaves the negative post through the shunt, so board ground sits below the post by battery current × shunt resistance, and VBUS reads high by that much: 10 mV per 100 A on a 500 A / 50 mV (0.1 mΩ) shunt. The INA228 measures that same drop across IN+ and IN- in the same conversion cycle, so the firmware subtracts the raw shunt voltage from the bus voltage before anything else uses the reading. It does this only when a shunt is installed with its resistance set, Shunt Location is set to Negative lead, and the shunt read succeeded. With a positive-lead shunt the drop is not in the VBUS reading, and subtracting it would make the reading low and overcharge the battery, so nothing is subtracted and the firmware never guesses the location. The ALERT comparator below works on the chip's raw bus voltage, without the correction. Where the step sits in the read is on Sensors.

ALERT Pin — Hardware Overvoltage Field Cut¶

The ALERT pin is not a passive status output. It is a safety-critical part of the overvoltage protection chain. The INA228's internal comparator is programmed with a bus-voltage threshold (VoltageHardwareLimit, the Hardware Shutdown Voltage, an absolute, persisted user setting, one rung above the software hard cut, so in a healthy system software acts first); when the measured battery voltage crosses it, the ALERT pin asserts and electrically pulls the shared field-enable node low, cutting the alternator field with no firmware in the loop: the backstop that works even if the processor is hung. The ESP32's field-enable output (GPIO4) reaches that node through a 10 kΩ series resistor, so the open-drain ALERT pin overrides whatever the processor is driving. The same ALERT! net is also brought out to the external ON/OFF wire (Cable 4 pin 14), which is why grounding that wire is a pure-hardware field shutoff.

Firmware configures the comparison with SLOW_ALERT set, so the threshold is evaluated against the averaged conversion result rather than instantaneous samples, so a single noise spike cannot assert the pin. The averaging depth is not fixed: the firmware reconfigures the ADC on the field-state edge (shallow, fast averaging while the field is on; deep, slow averaging once it is off; mode and timing figures are in Sensors). During charging the pin is therefore a millisecond-scale backstop. After a hardware event, firmware manages a software latch (inaOvervoltageLatched) that keeps the field suppressed until the condition is confirmed clear. See Safeties & Protections for the full protection chain.

Protection Circuitry¶

ESD and Transient Protection¶

Differential Input Protection¶

The differential shunt inputs (IN+ / IN-) are protected by:

C25: 100 nF / 100 V (0603) capacitor connected directly between IN+ and IN- at the chip. This is both the differential noise filter and a transient absorber for fast common-mode steps that turn into differential noise across the shunt leads.
The 100 Ω series resistors R72 and R73 (see Noise Filtering below) which clamp peak fault current into the INA228 inputs.

No TVS is fitted across IN+ / IN- or from either pin to ground, and there is no footprint for one on those nets. The shunt is external, at the battery. R72, R73, and C25 filter differential noise and limit current, but nothing clamps the common-mode voltage the way D15 clamps VBUS; see Common-Mode Exposure with a Positive-Lead Shunt below.

Overvoltage Protection on VBUS¶

D15: P6SMB68A transient voltage suppressor
Connected from the INA228 VBUS pin (pin 8) node to GND, on the chip side of R79, in parallel with C8
Standoff Voltage: 58.1 V (suitable for 48 V nominal / 59 V max battery voltage)
Breakdown Voltage: 64.6 V min, 71.4 V max
Clamping Voltage: 92 V max @ I_PP
Peak Power: 600 W (10/1000 µs pulse)

D15 sits on the chip side of the 100 Ω VBUS series resistor (R79), so R79 limits the current the TVS carries during a transient on the sense wire, and the clamped node is the one the INA228 pin sees.

Common-Mode Exposure with a Positive-Lead Shunt¶

IN+ and IN- are rated −0.3 to 85 V common-mode, both as the absolute maximum and as the recommended range, ±40 V differential, and 5 mA into any pin (TI INA228 datasheet, SLYS021A). The chip is designed for high-side use, and its electrical characteristics are specified at 48 V common mode, so steady state is fine on every voltage class: a 48 V bank absorbs near 58 V.

Transients are where the two shunt positions differ. VBUS has D15 behind R79 and is held well under 85 V. IN+ and IN- have only R72, R73, and C25, with no clamp to ground. A positive-lead shunt puts both inputs on the battery bus, so a load dump, such as a BMS opening the battery while the alternator is charging, reaches them unclamped. Once a pin is past 85 V, its 100 Ω resistor lets the 5 mA limit through after only about 0.5 V more.

The exposure is common-mode only. The shunt is one piece of metal, so a disconnect sits on one side of it or the other, never between its terminals. With the disconnect on the battery side (a drop-in lithium battery with an internal BMS, or a contactor between battery and shunt), both terminals ride the bus spike together: the differential stays near zero and the common mode takes the whole spike. With the disconnect on the load side, both terminals stay at battery voltage and no spike reaches either. The ±40 V differential limit can only be reached by a miswire, with a sense wire landed somewhere other than the shunt's own terminal and the disconnect in between.

A negative-lead shunt has no such exposure: its inputs sit near ground, and a load dump raises the positive side. With a positive-lead shunt, the chance of a spike above 85 V scales with the voltage class. 85 V is about six times nominal on a 12 V system and three and a half times on 24 V, where a spike that size would also destroy most other electronics on the bus, but only about 1.45 times the 58.8 V bulk voltage of a 48 V system. The peak depends on the alternator's rectifiers and on what else on the bus absorbs it. The regulator's fast over-voltage cut shortens the event but not its first peak, because the rotor holds its field for tenths of a second. The same chip is the regulator's battery voltage measurement and its hardware over-voltage comparator: a chip that dies outright trips the sensor-fault cut, while one damaged into reading wrong but plausibly is the case that matters. The wiring pages therefore recommend the negative lead on every system, and on 36 and 48 V systems with a positive-lead shunt, bringing its current in over VE.Direct or NMEA 2000 instead of wiring Cable 2 pins 9 and 10 to it.

A clamp on IN+ and IN- is possible on a later board, but leakage through the 100 Ω series resistors becomes an offset: 1 µA of mismatch is 100 µV, which is 1 A on a 0.1 mΩ shunt. It needs a low-leakage design, not a copy of D15.

Noise Filtering¶

Input Series Resistors — Differential Pair¶

The IN+ and IN- pins each carry a 100 Ω series resistor between the shunt terminal and the INA228 pin. They are deliberately a matched pair (same value, same tolerance, same package, placed symmetrically) so that any common-mode signal at the shunt remains common-mode at the INA228 inputs. Asymmetry would convert common-mode noise into differential error voltage, directly visible as apparent shunt current.

R72 (IN-) = 100 Ω, 1 %, between the shunt − sense input (Cable 2 pin 10) and INA228 pin 9 (IN-)
R73 (IN+) = 100 Ω, 1 %, between the shunt + sense input (Cable 2 pin 9) and INA228 pin 10 (IN+)

J20 and J21 are unpopulated two-pin footprints across R73 and R72 respectively, so either resistor can be bypassed with a jumper for a test.

The 100 Ω value is a compromise: high enough to limit fault current into the INA228 inputs (5 mA maximum into any pin, which 100 Ω allows at 0.5 V past the pin's rating, so these resistors limit current but do not clamp voltage), low enough that the input bias current of the INA228 (typ. 1 µA at IN+/IN-) produces only ~100 µV of error, well below the ADC LSB at any practical PGA setting.

Differential Filter¶

C25 (100 nF, 100 V, 0603) is wired directly between IN+ and IN- at the chip pins. Combined with the two 100 Ω series resistors, the differential filter is a single-pole low-pass:

fc_diff = 1 / (2π × (R72 + R73) × C25)
        = 1 / (2π × 200 Ω × 100 nF)
        ≈ 7.96 kHz

That corner sits well above any realistic battery transient of interest: state-of-charge dynamics are sub-Hz, and load steps from inverters are below 1 kHz.

Why no capacitor from IN+ or IN- to GND: Adding either ground-referenced capacitor breaks the impedance match between IN+ and IN- at high frequency. A common-mode signal would then see different impedances on each leg and convert into differential error voltage, the exact failure mode the matched-100 Ω network is built to prevent. C25 stays between the two pins only.

VBUS Filter (Battery Voltage Sensing)¶

R79: 100 Ω in series between VBUS_INA228 and INA228 pin 8 (VBUS)
C8: 1 µF / 100 V from INA228 pin 8 to GND
Cutoff: fc = 1 / (2π × 100 × 1e-6) ≈ 1.59 kHz

Bus voltage on a marine system changes far more slowly than the alternator field PWM (SwitchingFrequency, 400 Hz firmware default, dashboard-configurable to 19.45 kHz; the field winding's inductance smooths individual PWM cycles out of the bus entirely), so 1.59 kHz preserves the dynamics the XREG-010 needs to observe while attenuating wiring-borne pickup above audio frequencies.

All series resistors are footprinted as 0603 and can be replaced with 0 Ω if a test scenario requires unfiltered access.

Electrical Specifications¶

Operating Voltage Ranges¶

INA228 Absolute Maximum Ratings¶

Parameter	Minimum	Maximum	Unit
Supply Voltage (VS)	-	6	V
VBUS	-0.3	85	V
Differential (VIN+) - (VIN-)	-40	+40	V
Common-mode (VIN+, VIN-)	-0.3	85	V
SDA, SCL	-0.3	6	V
ALERT	-0.3	VS + 0.3	V

System Design Margins¶

Battery Voltage Range: 48V nominal, up to 59V maximum
VBUS Margin: 85V max rating vs 59V system max = 26V margin
Common-mode Margin: IN+ and IN- sit near ground with a negative-lead shunt, and at bus voltage (59 V max, 26 V under the 85 V rating) with a positive-lead shunt, with no clamp for transients

Current Measurement Specifications¶

Expected Signal Levels¶

Maximum Current: 500A (extreme case)
Typical Shunt Resistance: ~75µΩ to 150µΩ (standard for 500A applications)
Maximum Shunt Voltage: 500A × 150µΩ = 75mV
INA228 Differential Range: ±163.84mV (typical) - adequate margin

Power Consumption Analysis¶

INA228 Power Consumption¶

Normal Operation (3.3V Supply)¶

Supply Current (Typical): 640µA
Supply Current (Maximum): 750µA at 25 °C; 1.1mA over the full temperature range
Standby Current: 2.8µA typical, 5µA maximum (shutdown mode)

Calculated Power Consumption¶

Normal Operation:
P_typ = 3.3V × 0.64mA = 2.1mW
P_max = 3.3V × 1.1mA = 3.6mW

Standby Mode:
P_standby = 3.3V × 2.8µA = 9.24µW

System Power Consumption Estimates¶

Continuous Monitoring Mode¶

Condition	Supply Current	Power (3.3V)
Typical Operation	0.64mA	2.1mW
Maximum Operation	1.1mA	3.6mW

Low Power Modes¶

Condition	Supply Current	Power (3.3V)
Shutdown Mode	2.8µA	9.24µW

Note: Power consumption figures do not include I2C pull-up resistor power or external circuitry

Performance Characteristics¶

Measurement Accuracy¶

Current Measurement Resolution: Depends on shunt value and ADC configuration
Voltage Measurement Resolution: Set by the INA228's 20-bit delta-sigma ADC; conversion time and averaging depth are programmable

Filtering Performance¶

VBUS Filter Bandwidth: ~1.59kHz (-3dB point)
Differential Filter Bandwidth: ~7.96kHz (-3dB point); see corrected calculation above
Common-mode Rejection: Enhanced by symmetric input impedance design

I2C Interface Configuration¶

Device Address¶

7-bit Address: 0x40 (A0 pin tied to ground)
R/W Bit: Bit 0 of I2C transaction
Full 8-bit Address: 0x80 (write), 0x81 (read)

Communication Features¶

ALERT Pin: Configurable threshold alerts
Data Rate: Standard I2C speeds supported (100kHz, 400kHz)

Design Verification Checklist¶

Critical Parameters Verified¶

P6SMB68A standoff voltage (58.1 V) above max battery voltage (59 V)
All capacitor voltage ratings (100 V) above max system voltage (59 V)
INA228 VBUS rating (85 V) above max battery voltage (59 V)
Differential signal range (±163.84 mV at PGA = 1) within INA228 limits
VBUS protection (P6SMB68A) appropriate for battery overvoltage events
Filter cutoff frequencies (7.96 kHz differential, 1.59 kHz VBUS) suitable for battery monitoring
Symmetric 100 Ω / 1 % input impedance for optimal common-mode rejection
No ground-referenced capacitors on differential inputs, which prevents CM→DM conversion