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Alternator Field Control

Overview

This circuit provides PWM control of marine alternator field current up to 10 A. The design supports both P-type (high-drive) and N-type (low-drive) alternators through external jumper configuration. The power stage uses a single N-channel MOSFET driven by a floating high-side driver with bootstrap supply.

The field power path does not run through the board's protected rail: in P-type it comes from the BAT+ input terminal through the bridge, and in N-type from the alternator's own internal B+. Only the gate driver's supply is derived from the protected rail, through the buck regulator and the 12 V boost. The power entry stage itself is documented in Input Protection.

Key Specifications: - Logic/Boost Supply: 5V - Field Supply: the BAT+ input through the P-type bridge (P-type), or the alternator's own internal B+ (N-type) - Maximum Field Current: 10 A continuous - PWM Frequency: 400Hz firmware default (user-configurable in the dashboard up to 19.45kHz; settings below ~5kHz in P-type configuration run the bootstrap refresh behavior described under Bootstrap Circuit below) - PWM Frequency Range: the power stage itself is good from 100Hz to above 20kHz (thermally limited); the dashboard setting is clamped in firmware to 100Hz–19455Hz, the 12-bit LEDC ceiling - Supported Alternator Types: P-type (high-drive) and N-type (low-drive) - Control Input: 3.3V PWM from ESP32 microcontroller

Test Results (single MOSFET configuration): - Bank Nominal Voltage: 12V - Date: 9/10/25 - Enclosure: None - Ambient Temp: 63F - PWM Frequency: 1200Hz - PWM Duty Cycle: 100% - Battery Voltage: 12.93V - Field Voltage: 12.83V - Field Current (engine off): 4.2A - Maximum PCB Temp: ~30C (most residual from soldering) - Conclusion: No thermal issues in the switching MOSFET at this point. V3 issues were caused by high MOSFET Rds(on) from insufficient Vgs. At 100 % duty no current flows through the freewheel diode, so this test says nothing about it. At high field current on 24 and 48 V systems, the diode's heat spreader (P-type) and the field connector (N-type) do reach their ratings, which is what the regulator's drive-heat ceiling is for.


Key Net Names

Net Name Description
BAT+ input Battery positive at the power/field connector, ahead of the TPS48000 stage; the P-type bridge and the N-type return diode land here
FIELD_FOR_N_TYPE Q3 drain — field output terminal in N-type mode
FIELD_FOR_P_TYPE Q3 source — field output terminal in P-type mode; also HS reference for gate driver
GND Board ground

Jumper Configurations

The installer-facing version of this choice — how to identify the alternator type, which terminal the field wire lands on, and the jumper install procedure — is on Alternator Type and Power/GND/Field wiring. Below is the board-level view in net-name terms.

P-type Alternator / High Drive

Jumper the BAT+ input to FIELD_FOR_N_TYPE (Q3 drain).

The alternator field wiring connects between FIELD_FOR_P_TYPE (Q3 source) and the alternator's internally grounded brush. The far side of the field winding is tied to GND inside the alternator.

Current path (Q3 ON): BAT+ input → jumper → FIELD_FOR_N_TYPE (Q3 drain) → Q3 → FIELD_FOR_P_TYPE (Q3 source) → field winding → alternator internal GND → GND

Active flyback diode: D5 (anode=GND, cathode=FIELD_FOR_P_TYPE) When Q3 turns off, FIELD_FOR_P_TYPE falls below GND. D5 conducts, freewheeling field current through the winding.


N-type Alternator / Low Drive

Jumper FIELD_FOR_P_TYPE (Q3 source) to GND.

The alternator field wiring connects between FIELD_FOR_N_TYPE (Q3 drain) and the alternator's internally B+-connected brush. The far side of the field winding is tied to battery positive inside the alternator.

Current path (Q3 ON): B+ (alternator internal) → field winding → FIELD_FOR_N_TYPE (Q3 drain) → Q3 → FIELD_FOR_P_TYPE (Q3 source) → jumper → GND

Note: the board's protected rail carries no field current in either configuration. In N-type the B+ supply to the field comes from the alternator's own internal brush connection, not through the board.

Active flyback diode: the N-type return diode (anode=FIELD_FOR_N_TYPE, cathode=BAT+ input). When Q3 turns off, FIELD_FOR_N_TYPE rises above battery voltage. The return diode conducts, freewheeling field current through the Regulator BAT+ wire and the alternator output cable and back into the winding. Because it lands on the battery side of the input protection stage, the path is intact whether or not the protection stage has tripped.

A field fuse is required in both wiring configurations — see the FAQ below.


Circuit Architecture

Block 1: Level Shifter and System Enable Logic (3.3V → 5V)

Purpose: Translate ESP32 3.3V FIELD_ENABLE signal to 5V logic for boost converter control while providing multiple system disable conditions.

IC: U15 - SN74LVC1T45DBV Single-Bit Dual-Supply Bus Transceiver - VCCA (Pin 1): 5V supply for A-side - VCCB (Pin 6): 3V3 supply for B-side - B (Pin 4): Combined input from three control signals - A (Pin 3): Output to MT3608 Enable pin (5V logic) - DIR (Pin 5): Direction control — tied to GND (Pin 2) - GND (Pin 2): Ground

System Enable/Disable Logic:

The system uses a wired-AND configuration at U15 Pin 4 combining three control signals:

  1. FIELD_ENABLE (ESP32 GPIO4): Active-HIGH enable
  2. 3.3V from ESP32 GPIO4 through R50 (10kΩ series resistor)
  3. When LOW or ESP32 unpowered: disables entire system

  4. ALERT! (INA228 Alert Pin): Active-LOW disable

  5. Open-drain output from battery current monitor IC
  6. INA228 monitors battery rail current, not field current
  7. Pulls low on overcurrent or fault condition

  8. ON/OFF (Manual Toggle Switch): Active-LOW disable

  9. Shorts pin to GND when in OFF position

Logic Function: - ENABLED when: FIELD_ENABLE = HIGH AND ALERT! = open AND ON/OFF = open - DISABLED when: FIELD_ENABLE = LOW OR ALERT! = active OR ON/OFF = closed

Enable Signal Path: FIELD_ENABLE / ALERT! / ON/OFF → U15 Pin 4 → U15 Pin 3 (5V) → U21 Pin 4 (EN) → MT3608 → 12V for LM5109A


Block 2: Boost Converter (5V → 12V)

Purpose: Generate 12V supply for gate driver from 5V logic input.

IC: U21 - MT3608 (SOT-23-6) - VIN (Pin 5): 5V via C42 (22µF) - VOUT: 12.07V - EN (Pin 4): From U15 Pin 3 - fSW: ~1.2MHz

Key Components: - L4: Shun Xiang Nuo SMNR4020-22UH (22µH) - D2: 1N5819WS (C191023) — 40V/1A Schottky boost rectifier, SOD-323 - C43, C63: Samsung CL10A226MO7JZNC, 22µF each 16V X5R 0603 (44µF rated total). X5R at 12.07V loses most of its rated value to DC bias — read the part's DC bias curve, not the rated value, when sizing against the MT3608's loop compensation.

Feedback Network: - R94: 10kΩ (VOUT to FB) - R95: 523Ω (FB to GND) - Setpoint: V_OUT = 0.6V × (1 + 10000/523) = 12.07V


Block 3: High-Side MOSFET Driver

Purpose: Floating high-side gate drive for field current switching.

IC: U22 - LM5109AMA (SOIC-8) - Pin 1 (VDD): 12.07V from boost converter - Pin 2 (HI): PWM input via R89 (100Ω series), R54 (10kΩ pull-down) - Pin 3 (LI): Tied to GND per datasheet requirement - Pin 4 (VSS): Ground - Pin 5 (LO): Not connected - Pin 6 (HS): Connected to FIELD_FOR_P_TYPE (Q3 source) — floating reference, valid in both configurations - Pin 7 (HO): Gate drive output → R103 (10Ω) → Q3 gate - Pin 8 (HB): Bootstrap supply input

Bootstrap Circuit: - R96: 2.2Ω — series resistor from the 12.07V rail into the D7 anode, limiting the C4 recharge current pulse. - D7: US1M (C412437) — 1A fast recovery, SMA. Higher Vf than ideal; first component to revisit if gate drive margin degrades. - C4: 0.1µF, 50V, 0603 (LCSC C14663) - Bootstrap budget: gate charge is minor (≈29nC → 0.29V per cycle). The dominant load is a continuous DC drain through R108, the gate-source pull-down, while the MOSFET is held on — 12.07V across 10kΩ is ≈1.1mA, which swamps the driver's ≈60µA HB quiescent current. C4 discharges exponentially through R103 + R108 (≈10kΩ), giving a time constant of about 1ms and roughly 0.6–0.7ms of continuous on-time before the driver's undervoltage lockout briefly refreshes the cap. Measured on the bench at 400Hz and 50% duty: first refresh at 0.73ms. - The refresh is self-rescuing rather than a fault. HO drops, the field freewheels through D5, C4 recharges through R96 in well under a microsecond, and HO returns; delivered duty still tracks the command. At settings of roughly 5kHz and above every on-time is far shorter than the hold-up and the bootstrap simply stays topped up. Below that — including the 400Hz firmware default — in P-type configuration the refresh cycle is active during normal charging — benign, measured, and documented on Hardware Versions. - V10 change: R108 becomes 100kΩ and C4 becomes 2.2µF (100V X7R, 0805). Cutting the drain by ten and raising the capacitance by twenty-two extends hold-up by more than two orders of magnitude, which clears the worst case the firmware can command (99% duty at the 100Hz frequency floor, a 9.9ms on-time) with wide margin and removes the low-frequency constraint entirely. Validated on the bench with those values fitted: at 400Hz and 50% duty the first dropout moved from 0.73ms to the commanded 1.25ms off-edge, at 100Hz and 50% duty it landed at 4.9997ms against a 5.000ms on-time, and 86 triggered captures at 25MS/s recorded no refresh events.

Note on HS reference: HS connects to FIELD_FOR_P_TYPE (Q3 source) in both configurations. In P-type mode this is the switching field output node. In N-type mode this node is jumpered to GND. Bootstrap reference is valid in both cases.


Block 4: Power MOSFET and Field Output Stage

MOSFET: Q3 - BSC072N08NS5ATMA1 - Package: SuperSO8 (TDSON-8, 5×6 mm) - Vds max: 80V - Rds(on): 7.2mΩ max @ Vgs=10V - Qg: 29nC max @ 10V - Id continuous: 74A (Tc = 25°C; 47A at Tc = 100°C) - Vgs max: ±20V - EAS (single pulse avalanche): 40mJ

This is the same device (BSC072N08NS5ATMA1) used for the back-to-back input protection MOSFETs in the TPS48000 power entry stage.

Conduction loss at 10 A: P = I² × Rds(on) = 10² × 0.0072 = 0.72 W at 25 °C. On-resistance climbs with temperature, roughly 1.6× at 125 °C, so the hot figure is about 1.15 W.

Q3 Pin Connections: - Pin 4 (Gate): HO via R103 (10Ω); R_GS upper terminal - Pin 5 (Drain — the large tab pad): FIELD_FOR_N_TYPE - Pins 1–3 (Source): FIELD_FOR_P_TYPE — also U22 Pin 6 (HS), D5 cathode, C4 low side, R_GS lower terminal

Gate-Source Pull-Down R_GS (R108, 10kΩ): Connected between Q3 gate (Pin 4) and Q3 source (FIELD_FOR_P_TYPE). - In P-type mode: holds gate at source potential when driver is high-impedance - In N-type mode: source is jumpered to GND, so R_GS holds gate unconditionally at GND. Vgs = 0, Q3 off. Effective in both modes regardless of driver or ESP32 state.

Flyback Diodes:

Designator Part Anode Cathode Active Configuration
D5 FSV20100V GND FIELD_FOR_P_TYPE (Q3 source) P-type / High Drive
Return diode SB5H100 FIELD_FOR_N_TYPE (Q3 drain) BAT+ input N-type / Low Drive

Both diodes are always fitted. The inactive diode in each configuration has no effect on operation.


System Operation

Normal Operation

  1. ESP32 FIELD_ENABLE (with ALERT! inactive and ON/OFF switch ON) enables MT3608 via U15
  2. MT3608 generates 12.07V for LM5109A
  3. ESP32 PWM drives LM5109A HI pin
  4. LM5109A drives Q3 gate via R103
  5. Q3 PWM-switches field current
  6. D5 or the N-type return diode (per configuration) freewheels inductive energy at each Q3 turn-off

Field Current Paths

The Q3-ON conduction paths and the active flyback diode for each configuration are given under Jumper Configurations above; the installer-terms version is on Alternator Type and Power/GND/Field wiring. The freewheel (Q3 OFF) paths:

P-type, Q3 OFF (D5 freewheeling): GND → D5 → FIELD_FOR_P_TYPE → field winding → alternator internal GND → GND

N-type, Q3 OFF (return diode freewheeling): FIELD_FOR_N_TYPE → return diode → BAT+ input → Regulator BAT+ wire → alternator output cable → alternator internal B+ → field winding → FIELD_FOR_N_TYPE


Bill of Materials

Active Components

Designator Part Number Description Package Rating
U15 SN74LVC1T45DBV Bus transceiver / level shifter SOT-23-6 5.5V, 32mA
U21 MT3608 Boost converter SOT-23-6 2A, 24V
U22 LM5109AMA High-side MOSFET driver SOIC-8 100V, 1A peak
Q3 BSC072N08NS5ATMA1 N-channel MOSFET SuperSO8 80V, 74A, 7.2mΩ

Passive Components

Designator Value Rating Package Function
L4 22µH — SMNR4020 Boost inductor
C42 22µF 16V 0603 Boost input filter — shared with the TPS2116 mux output (net 5V)
C43 22µF 16V 0603 Boost output filter
C63 22µF 16V 0603 Boost output filter
C4 0.1µF 50V 0603 Bootstrap capacitor (LCSC C14663)
C11 1µF — 0603 Level shifter supply filter
R94 10kΩ 1% 0603 Feedback divider upper
R95 523Ω — 0603 Feedback divider lower
R96 2.2Ω — 0603 Bootstrap recharge series resistor (12.07V rail to D7 anode)
R103 10Ω — 0603 Gate drive series resistor (HO to Q3 gate)
R89 100Ω — 0603 PWM input series resistor
R54 10kΩ — 0603 PWM input pull-down
R108 10kΩ — 0603 Gate-source pull-down (100kΩ in V10)

Diodes

Designator Part Package Rating Function
D2 1N5819WS (C191023) SOD-323 40V, 1A Boost rectifier
D7 US1M (C412437) SMA 1000V, 1A Bootstrap charging diode
D5 FSV20100V — 100V, 20A P-type flyback (anode=GND, cathode=FIELD_FOR_P_TYPE)
Return diode SB5H100 DO-201AD 100V, 5A N-type flyback (anode=FIELD_FOR_N_TYPE, cathode=BAT+ input)

Net Connections

Power Rails

3V3: U15 Pin 6 (VCCB), C11+

5V: U15 Pin 1 (VCCA), U21 Pin 5 (VIN), C42+

12.07V Boost: D2 cathode, C43+, C63+, C37+ (1µF), U22 Pin 1 (VDD), R96 (to D7 anode), R94 top

FIELD_FOR_N_TYPE: Q3 pin 5 (drain tab); return diode anode; field wiring terminal (N-type) or jumper to the BAT+ input (P-type)

FIELD_FOR_P_TYPE: Q3 pins 1–3 (source); U22 Pin 6 (HS); D5 cathode; C4 low side; R_GS lower terminal; field wiring terminal (P-type) or jumper to GND (N-type)

GND: U15 Pin 2, U21 Pin 2, U22 Pins 3+4, C42−, C43−, C63−, C11−, R95, R54, D5 anode, SS2H10 anode, bulk capacitor negative terminals; crowbar diode anode

Signal Connections

FIELD_ENABLE: ESP32 GPIO4 → R50 (10kΩ) → U15 Pin 4

ALERT!: INA228 alert → U15 Pin 4 (open drain, pulls low on battery rail fault)

ON/OFF: Manual switch → U15 Pin 4 (shorts to GND when OFF)

OUT_PWM: ESP32 GPIO14 → R89 → U22 Pin 2 (HI); R54 pull-down to GND

Bootstrap

  • 12.07V rail → R96 (2.2Ω) → D7 anode
  • D7 cathode → C4+, U22 Pin 8 (HB)
  • C4− → FIELD_FOR_P_TYPE (Q3 source, U22 Pin 6 HS)
  • U22 Pin 7 (HO) → R103 (10Ω) → Q3 gate
  • Q3 gate → R108 → FIELD_FOR_P_TYPE (gate-source pull-down)

Feedback

  • R94 top → 12.07V rail
  • R94 bottom → R95 top → U21 Pin 3 (FB)
  • R95 bottom → GND

Physical Layout Considerations

High Current Paths

  • BAT+ input to FIELD_FOR_N_TYPE (P-type bridge): carried by the jumper blade at the connector, not by board copper
  • FIELD_FOR_N_TYPE through Q3 to FIELD_FOR_P_TYPE: wide traces, heavy copper
  • GND: solid ground plane

Switching Node (FIELD_FOR_P_TYPE — High dV/dt)

  • Keep C4 and D7 tight to U22
  • Minimize HB–HS loop area
  • Route away from logic signals

Flyback Diodes

  • D5: place close to FIELD_FOR_P_TYPE and GND
  • Return diode: short leads between FIELD_FOR_N_TYPE and the BAT+ input
  • Both carry fast dI/dt at Q3 turn-off; minimize lead inductance

Gate Drive

  • R103 and R_GS: place directly at Q3 gate and source pads
  • U22 to Q3 gate: short, controlled impedance